A priority event monitor for an interrupt-driven microprocessor

Abstract

A priority event monitor has been designed, built, and tested for an interrupt-driven microprocessor system. The priority event monitor consists of monitor hardware, an SCSI (small computer system interface), bus link, and a host computer. The monitor hardware observes the control, address, and data buses for the interrupt-driven microprocessor and logs priority events with an event flag and a 1- mu s timestamp. The event flags and timestamps are formed into event records and then sent to a host computer, across the SCSI bus, for permanent storage, conversion, and analysis. The monitor hardware uses event logging hardware and FIFO (first in, first out) buffering for event storage and timestamping, and a DMA controller and SCSI bus interface for sending the captured events to the host. The monitor is controlled by a local microcontroller. The SCSI bus will transfer 128 records (4 bytes each for a total of 512 bytes) in roughly 550- mu s. This corresponds to a 930-kbyte/s transfer rate. >