Abstract
In consideration of the difficulties related to interconnectivity and energy usage in binary logic, designers have felt compelled to explore ternary logic as a viable alternative. The most effective approach for implementing circuits based on ternary logic involves the use of the multi-threshold voltage (Vth) technique. In the case of field-effect transistors (FETs) that utilize graphene nanoribbons (GNRs), known as GNRFETs, the value of Vth relies on the GNR’s width, which can be adjusted by altering the dimer lines number. GNRFET shows potential as a replacement for CMOS technology due to the remarkable properties of GNR that help address scaling issues and short-channel effects. However, for real-time applications like portable electronic devices, power and energy efficiency are the primary concerns. Consequently, this paper presents a power and energy-efficient ternary multiplier based on 32-nm GNRFET technology. HSPICE simulation results obtained at 0.9 V demonstrate that the suggested circuit can achieve a minimum of 36.72% improvement in power and 28.17% enhancement in energy efficiency. This is accomplished through the utilization of distinct methods such as specific transistor configurations, unary operators, and dual power sources. Moreover, Monte-Carlo simulation results confirm the variation tolerance of the proposed circuit.
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More From: AEU - International Journal of Electronics and Communications
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