A Power Efficient and Fast Transient Response Low Drop-Out Regulator in Standard CMOS Process

Abstract

In this paper a low drop out regulator (LDO) is proposed, which can adaptively change driving current to the PMOS gate and have a fast transient response time. As we know, LDO circuits have to provide a regulated output voltage regardless of input voltage variation, load current variation, and process variation. A load transient test will test the transient behavior of changing output loading. In order to get a good performance in a load transient testing, a buffer with current driving capability is usually added in front of PMOS gate to make the transient response faster. This buffer needs to drive the PMOS gate, and it will consume a few quiescent current in LDO circuits. This static quiescent current will occupy a few percentage of power consumption of LDO circuits at a light load condition, and the efficiency of the LDO at a light load condition will be very poor. In this paper, we proposed a new architecture of LDO, which can adaptively change the driving current of the buffer to the PMOS gate. Then we can improve the efficiency of the LDO up to 10% at light load condition. Meanwhile, we can have a fast transient response time. The load transient response time from 1mA to 138mA is about 2mus, which is faster than other reference designs. This chip is manufactured in 0.35mum standard CMOS process, and it consumes 24muA in a light load condition