Abstract

With ever increasing particle beam energies and interaction rates in modern High Energy Physics (HEP) experiments in the present and future accelerator facilities, there has always been the demand for robust Data Acquisition (DAQ) schemes which perform in the harsh radiation environment and handle high data volume. The scheme is required to be flexible enough to adapt to the demands of future detector and electronics upgrades, and at the same time keeping the cost factor in mind. To address these challenges, in the present work, we discuss an efficient DAQ scheme for error resilient, high speed data communication on commercially available state-of-the-art FPGA with optical links. The scheme utilises GigaBit Transceiver (GBT) protocol to establish radiation tolerant communication link between on-detector front-end electronics situated in harsh radiation environment to the back-end Data Processing Unit (DPU) placed in a low radiation zone. The acquired data are reconstructed in DPU which reduces the data volume significantly, and then transmitted to the computing farms through high speed optical links using 10 Gigabit Ethernet (10GbE). In this study, we focus on implementation and testing of GBT protocol and 10GbE links on an Intel FPGA. Results of the measurements of resource utilisation, critical path delays, signal integrity, eye diagram and Bit Error Rate (BER) are presented, which are the indicators for efficient system performance.

Highlights

  • We focus on implementation and testing of GigaBit Transceiver (GBT) protocol and 10 Gigabit Ethernet (10GbE) links on an Intel Field Programmable Gate Array (FPGA)

  • It is found that the measurement of Bit Error Rate (BER) for GBT protocol with respect to the optical power as shown in figure 14 cannot be pursued below -17 dBm receiver sensitivity, due to the loss of recovered clock

  • The Data Processing Unit (DPU) is located in the counting room and implemented using commercially available state-of-the-art FPGAs with large resources as compared to the radiation hardened FPGAs

Read more

Summary

Experiments at System

Modern DAQ for HEP and nuclear physics experiments is a result of continuous evolution [4]. With the proposed upgrade in the coming years, the LHC beam energies will increase and the beam luminosity will progressively ramp up to six times of its current design value of 1 × 1034 cm−2s−1 It will increase the interaction rates which will lead to a dramatic increase in the channel occupancy, data rate and data volume [6]. The key issues in the design of DAQ for HEP experiments are the high data rate communication with error resiliency in the harsh radiation environment, quick upgradation, easy reconfigurability and portability on other platforms. A Field Programmable Gate Array (FPGA) based new DAQ readout scheme is proposed that has high speed, fault tolerant readout architecture with the ability to perform in a harsh radiation environment, yet flexible enough to keep up with upgrades and instant reconfigurable.

DAQ architecture
10 Gigabit Ethernet Standard
Readout links
Front end interface — link-1
H SC 4 bit 4 bit RS Encoder
Back end interface — link-2
Test setup for the interfaces
Implementation of link-1
Implementation of link-2
C Avalon-MM-Pipeline
Model-2
Link-1
Link-2
Model-2 results
Discussion
Summary
Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call