A PMOS-switch based charge pump, allowing lost cost implementation on a CMOS standard process

Abstract

A 4-phase charge pump based on the low-voltage PMOS switching circuitry has been implemented in a 0.18/spl mu/m CMOS standard process, without any additional masking and process steps. The use of low-voltage PMOS switches overcomes the intrinsic limitations of high voltage NMOS devices such as: poor drive, large parasitic capacitance, threshold voltage sensitivity to body bias and temperature. Using the proposed circuitry, up to 14v output voltage has been measured on a 11-stage implementation powered at 1.2v, resulting in 97% of Vdd average gain per stage with capacitive loading only. In addition, nearly temperature independent efficiency of 53% has been measured on an extended Vdd range, for different current loads.