Abstract
In this article, a model of electromigration and stress-induced void formation in microelectronic interconnects is presented. This model solves the equations governing atomic diffusion and stress evolution in two dimensions, and can therefore account for the complex grain structures present in typical metal lines. A combined analytical and numerical solution scheme is developed to calculate the atomic fluxes and the evolution of mechanical stress, while avoiding the difficulties associated with finite element based approaches. Once a void has formed, growth is modeled by calculating the flux of atoms away from the void site. By combining models of atomic diffusion, stress evolution, void nucleation, and void growth, the complete void formation process can be simulated. To demonstrate this approach, void growth is calculated in interconnects where electromigration and thermal stress-induced damage have been experimentally observed. The results confirm that the model can quantitatively simulate void formation in realistic grain structures.
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