Abstract
In this paper, a compact architecture of a digital frequency synthesizer for a 2.4-GHz fast frequency hopping radio modem is presented. The synthesizer is designed for generating 12-bit quadrature carrier signals from 50 to 90 MHz in 500 kHz steps. The phase-to-amplitude conversion in the synthesizer is performed with a highly compressed look-up table (LUT). The read-only memory compression is based on the property that only a limited set of discrete frequencies is needed. Simulation and synthesis results for a VHDL-implementation of the architecture are given. In addition, the proposed architecture is compared to a traditional look-up based direct digital frequency synthesizer with similar performance. Layouts were generated for both designs using a 3.3-V 4-metal 0.35-/spl mu/m n-well standard cell CMOS technology. The proposed synthesizer was found to be 59% smaller in area than the reference design.
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More From: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
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