Abstract
Summary form only given. Devices have been fabricated using conventional SOS, rapid thermal anneal (RTA) SOS, solid-phase epitaxy and regrowth (SPEAR) SOS, RTA-SPEAR SOS, separation by implantation of oxygen (SIMOX), RTA-SIMOX, and zone-melt recrystallization (ZMR) wafers. The process sequence used was a double-level-metal 1.25- mu m CMOS/SOS process. A comprehensive test vehicle featuring 16 K and 64 K SRAMs was used to allow both parametric and functional characterization. For 0.3- mu m silicon film thickness on SOS, SPEAR processing resulted in a 30% improvement in carrier mobilities and a 10-20% improvement in device saturation currents over conventional SOS. No significant leakage improvement was observed. RTA processing at 1390 degrees C has shown potential for performance enhancement on SOS. Mobility improvements of 10-20% have been demonstrated, while drain leakage was unchanged. Preliminary SIMOX results have indicated improvements of 50% for electron mobilities, with hole mobilities unchanged over conventional SOS. Drain leakage was two orders of magnitude lower. Characterization results have also been obtained for ZMR, RTA-SPEAR SOS, improved SPEAR-SOS, and improved SIMOX wafers. >
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
