Abstract
Device Modeling is utilized to engendering incipient device models for the demeanor of the electrical devices predicated on fundamental physics. Modeling of the device may also include the creation of Compact models. An emerging device type of transistor is the Tunnel Field-Effect transistor that achieves compactness and speed during device modeling. This article presents an analytical comparative study of duel material DG TFETs and triple Material DG TFETs with gate oxide structure . Here the implementation of device modeling is done by solving Poisson’s equation with Parabolic Approximation Technique(PAT).The process of formulation of drain current(Id) model is based on integrating the BTBT generation. A Transconductance model of the device is additionally developed utilizing this drain current model of TFET. Surface potential is calculated by utilizing the channel potential model. The electrical properties like Surface potential〖(Ψ〗_(s,i)), Drain current (Id ), and Electric field(Ei) have been compared for both Duel material DG-TFET and Triple material DG-TFET. The comparison statement of DMDG-TFETs and TMDG-TFETs provide improved performance. The analytical model of the device results are compared with simulated results for DMDG TFET and TMDG TFET and good acquiescent is examined.
Highlights
As we scale down the MOSFET to sub-30 nm administration, deals with the major complexity and noteworthy challenges
The analytical model of the device results are compared with simulated results for DMDG Tunnel FET (TFET) and TMDG TFET and good acquiescent is examined
The device model is verified by comparing its results with simulated results obtained from TCAD software with parametric characteristics The Oncurrent(ION) of the TFETs can be significantly enhanced by adding the Triple Material high-k stacked gate oxide in the Double Gate TFETs
Summary
As we scale down the MOSFET to sub-30 nm administration, deals with the major complexity and noteworthy challenges. Poor electrostatic control and decreased short channel conduct of routine MOSFET offers ascend to the low esteem of depleting incited hindrance bringing down and high spillage current in OFF state. Low estimation of SS gives a lower sub-threshold spillage which offers ascend to low power dissemination. The new emerging methods like the Band Gap Engineering ,Gate-Oxide Engineering used to enhance the ON-current and reduces the leakage through the gate dielectric of the TFETs. The new emerging methods like the Band Gap Engineering ,Gate-Oxide Engineering used to enhance the ON-current and reduces the leakage through the gate dielectric of the TFETs This is what it refers to that the different electrical characteristics of the Tunnel FETs can be ameliorated significantly by superseding the conventional SiO2 by a stacked gate oxide of SiO2 and a high-k dielectric material in the Double Gate Tunnel FETs. A DMG- TFET was proposed because to mitigate such issues (ie., low ON current) in which the tunneling gate has work function lower than that of the auxiliary gate for n-channel and vice-versa for p-channel of TFET. The device model is verified by comparing its results with simulated results obtained from TCAD software with parametric characteristics The Oncurrent(ION) of the TFETs can be significantly enhanced by adding the Triple Material high-k stacked gate oxide in the Double Gate TFETs
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