Abstract
Linearization of the gate-source capacitance in a GaAs FET using a parallel reverse biased gate-source junction and complex capacitance is proposed. This method offers a simple and low-cost solution in reducing AM/PM distortion. An analysis for maximizing the performance of this linearizer is also presented. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 44: 485–487, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20674
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