A novel ultra low power ASK demodulator for a passive UHF RFID tag compatible with C1 G2 EPC standard protocol

Abstract

In order to reduce the power consumption of RFID tags and increase the reading range of RFID systems, this paper proposes an ASK demodulator that uses a new approach to reduce the threshold voltage of diode connected MOS transistors as an obstacle in the design of the envelope detector. Also, an ultra low power comparator is used for further power reduction. This circuit has been simulated in a 0.18 μm CMOS technology to satisfy EPC Class 1 Generation 2 standard protocol emphasizing on the reduction of power consumption. The proposed circuit can correctly demodulate the minimum input RF signal amplitude of 180 mV for modulation depths of 55---100 % with 40---160 kb/s data rates. A total power consumption of less than 290 nW is achieved at a 1.2 V power supply. Effects of the input signal additive white noise as well as the process and temperature variations on the signal demodulation is also investigated in this paper.