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Abstract
SummaryThe time delay unit‐based PLLs (TD‐PLLs) are widely used in grid synchronization in single‐phase power systems. However, the TD‐PLL is vulnerable to frequency variations and harmonic disturbances, leading to grid synchronization failures. Analysis shows that the performance degradation is due to the inability to obtain the variation of the input signal frequency. This paper proposes a new time delay‐based phase‐locked loop called immune to double frequency component TD‐PLL (IDFC‐TD‐PLL) based on a feedback structure to accurately capture the variation of input signal frequency, which can improve the dynamic performance and the performance against harmonic interference. Simulations and experiments have evaluated the performance of the proposed phase‐locked loop, demonstrating its superior accuracy and dynamic performance compared to the phase‐locked loops referred in the paper.
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