A Novel Thin Wafer Handling Technology to Enable Cost-Effective Fabrication of Through-Glass Via Interposers

Abstract

Thin wafer handling technologies to fabricate silicon interposers have been widely discussed at conferences. Despite tremendous efforts to overcome several technical hurdles such as wafer chipping, cracking, and warpage, high manufacturing costs resulting from the complexity of the processes used to make silicon interposers remains a major concern. Fabricating a through-glass via (TGV) interposer using novel thin wafer handling (TWH) technology will be presented here as an example of a simple and cost-effective solution for realizing 2.5-D IC integration. Utilizing a simplified TWH technology, a TGV interposer with 30-μm-diameter vias to eliminate the isolation layer is combined with polymer-based polybenzoxazole (PBO) as passivation to build one to two redistribution layers (RDLs) with 20-μm line width on both sides after thinning to 100 μm. The simplified TWH requires only a release layer on the glass carrier and another layer of bonding material on the TGV wafer to enable fabrication of a TGV interposer. A process flow for fabricating a TGV interposer utilizing a simplified TWH technology will be presented in detail, including carrier treatment, bonding material, bonding, titanium/copper seed layer deposition, copper plating, RDL deposition, under-bump material (UBM) formation, debonding, and silicon chip stacking on a TGV interposer. The combination of TGV interposer and novel TWH technology will pave the way for cost-effective fabrication in 2.5-D IC.