Abstract
A switched capacitor bandgap voltage reference with correlated double sampling structure embedded in a temperature sensor is implemented in a standard 0.35 μm CMOS process. Due to the smaller change of the op-amp's output voltage, this topology is very suitable for low power applications. In addition, errors caused by the finite op-amp gain, input offset voltage, and 1/f noise are eliminated with the correlated double sampling technique. Additionally, two-level process calibration techniques are designed to minimize the process spread. Finally, a method of getting a full period valid reference voltage output is discussed and experimental results are provided to verify the effectiveness of the proposed structure.
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