A novel programming technique for highly scalable and disturbance immune flash EEPROM

Abstract

The program speed of a selected cell and the program disturbance of unselected cells sharing the common program-line in split-gate source-side injected flash memory has been investigated. It is found that the program disturbance becomes severe as the control gate length decreases. In this letter, we first propose a novel program technique by applying a negative bias to inhibited word-line to improve the trade-off between program speed and program disturbance. The experimental results indicate that the new program technique is a good candidate for future high-density, high-disturbance-immunity flash EEPROM memory applications.