A novel on-wafer approach to test the stability of GaN-based devices in hard switching conditions: Study of hot-electron effects

Abstract

In this work, a novel system to investigate the stability of GaN-based HEMT devices is presented and used to investigate hot-electron effects. The developed system is used to study the impact of hard switching on the dynamic on-resistance of such devices. In particular, we were able to obtain (on-wafer level) a very fast turn-ON commutation with dVDS/dt ≈ 10 V/ns (representative of realistic conditions) thanks to the low parasitics at the drain node. As a result, a realistic performance assessment of the dynamic stress of GaN power HEMTs is now available on wafer level, thus shortening the technology development loop. By intentionally tuning the capacitance at the drain node we can accurately control the amount of energy/charge released during each hard switching event, thus being able to evaluate the impact of increasing stress conditions on the devices. The results indicate that even if the hard-switching lasts few nanoseconds, it significantly impacts the dynamic RDSON: we conclude that hot-electron trapping can occur in ns-time scale.