A novel on-chip ESD protection circuit for GaAs HBT RF power amplifiers

Abstract

A low loading capacitance, 0.1 pF, on-chip electrostatic discharge (ESD) protection circuit for 2000 V HBM for GaAs power amplifiers that does not degrade RF circuit performance is introduced. Its principle of operation, loading capacitance, leakage current, ESD clamping characteristics, and robustness over process variation and temperature are investigated. Finally, a case study of its application to a 5.8 GHz power amplifier used for the wireless 802.11 A local area network is discussed.