A novel idea: using DTMOS to suppress FIBL effect in MOSFET with high- k gate dielectrics

Abstract

A novel idea that using dynamic threshold voltage metal-oxide-semiconductor (DTMOS) to suppress the fringing-induced barrier-lowing (FIBL) effect caused by application of high- k gate dielectrics into MOSFET is proposed in this paper. The performance of DTMOS is compared with the conventional MOSFET with high- k gate dielectrics. It is shown that with high- k gate dielectrics introduced into MOSFET, using DTMOS structure can not only retain its good subthreshold and output characteristics resulted from dynamic threshold voltage, but also suppress FIBL effect caused by application of the high- k gate dielectrics and can get better short-channel performance. Devices with different channel doping profile and smaller size are also simulated. Simulated results show that the above mentioned advantages are still remained.