A Novel General Compact Model Approach for 7-nm Technology Node Circuit Optimization From Device Perspective and Beyond

Qiang Huo,Zhenhua Wu,Xiaojin Zhao,Yongpan Liu,Feng Zhang,Weixing Huang,Jiaxin Yao,Ming Liu,Xingsheng Wang,Geyu Tang,Ling Li

doi:10.1109/jeds.2020.2980441

Abstract

This work presents a novel general compact model for 7-nm technology node devices like FinFETs as an extension of previous conventional compact model that based on some less accurate elements including one-dimensional Poisson equation for three-dimensional devices and analytical equations for short channel effects, quantum effects and other physical effects. The general compact model exhibits efficient extraction, high accuracy, strong scaling capability and excellent transfer capability. As a demo application, two key design knobs of FinFET and their multiple impacts on RC control electrostatic discharge (ESD) power clamp circuit are systematically evaluated with implementation of the newly proposed general compact model, accounting for device design, circuit performance optimization and variation control. The performance of ESD power clamp can be improved extremely. This framework is also suitable for path-finding researches on 5-nm node gate-all-around devices, like nanowire (NW) FETs, nanosheet (NSH) FETs and beyond.

Highlights

BSIM-CMG is the most widely used industry-standard compact model for FinFET and other ultra-scaled devices such as nanowire (NW) FETs and nanosheet (NSH) FETs [1]
We propose a novel general compact model on top of the technology computer-aided design (TCAD) calibrated compact models responding to Lg and Wfin in space from neighbors
We present a framework for classical RC control electrostatic discharge (ESD) clamp design from device perspective with the industry standard 7-nm technology node and beyond

Summary

INTRODUCTION

BSIM-CMG is the most widely used industry-standard compact model for FinFET and other ultra-scaled devices such as nanowire (NW) FETs and nanosheet (NSH) FETs [1]. HUO et al.: NOVEL GENERAL COMPACT MODEL APPROACH FOR 7-nm TECHNOLOGY NODE CIRCUIT OPTIMIZATION accuracy [8]. It exhibits high accuracy, strong scaling capability and excellent transfer capability. This model can respond very well to the Lg and Wfin as indicated in model evaluation section, and it only requires that the neighbor grid models are extracted accurately.

DEVICE PERFORMANCE ANALYSIS WITH TCAD

GENERAL COMPACT MODEL BUILDING

MODEL EVALUATION

ESD POWER CLAMP PARAMETERS ANALYSIS

Findings

CONCLUSION