A package method for reducing bus crosstalk in full chip ESD protection circuit

Abstract

In this paper, a package method that can be applied to the full-chip electrostatic discharge (ESD) protection circuit is presented. By connecting ESD protection circuit bus, power clamp circuit bus and core circuit bus to the conductor layer of package substrate, the bus of each module in internal chip will be independent respectively, so that it can reduce the bus crosstalk effect of core circuit that is induced by ESD pulse that are discharged from ESD protection circuit, and improve the robustness of chip. The method that power clamp circuit bus connect to the conductor layer of package substrate can not only reduce the parasitic resistance of the bus, but also improve the protect efficiency of the individual power clamp circuit and reduce the quantity of the power clamp circuit and the area of chip.