Abstract
This work presents a behavioral model for non-ideal effects in a novel Hybrid time-interleaved digital to analog converter (TIDAC). In Hybrid DACs, both ΔΣ and Nyquist structures are used. In this work, in the Nyquist path, the 2-time-interleaving technique is used and in the ΔΣ path, a new structure is proposed to reduce the critical path in the TI delta-sigma modulator (DSM). In conventional TIDSM, adding each channel to the structure leads to increasing the critical path as one full-adder. This, in turn, decreases the speed of modulator since a single feedback loop is utilized to compute the running sum of the input signals. In this work, a new type of poly-phase decomposition is presented that keeps the critical path for each number of channels constant and minimizes the number of full-adders. Simulations are performed on 4-TI-MASH 1-1 and Hybrid-TI current steering-DAC (CS-DAC) using an analytical behavioral model in presence of non-ideal effects. In order to realize non-ideal effects, a SIMULINK model for clock jitter error is proposed and added to the other types of error. Furthermore, a model for estimation of duty-cycle-error (DCE) is presented and utilized for calibration. Simulation results show that the proposed TIDSM has a good performance in MASH 1-1 modulator with the 20dB/dec noise shaping. Simulated error behaviors make a good insight into designing the DAC circuit parameters and calibration method.
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