A novel design of 9 level cascade multi-level inverter for decoupled double synchronous reference frame in state delay controller

Abstract

In this study, we investigate the performance and scheme of a Decoupled Dual Synchronous Reference Frame (DDSRF) system, which is investigated for compensation power generation via Shunt Active Filter (SAF)). Traditional direct power control theory and harmonic cancellation responsibilities are unreliable for unbalanced sources and loads. 9-level cascade multi-level inverter (NLC-MLI) ensures the establishment to generate sufficient compensation power. In this paper, instantaneous active power and reactive power (PQ) are represented by positive, negative, zero sequence and harmonic components. This is to counteract the unbalanced operation of the load, i.e. twice the frequency at which each reference signal is generated. Due to the delay properties of the signal generation control loop, the compensation time can deviate from the reference signal measurement point. A state delay controller (SDC) is proposed to reduce the intermediate delay between the inserted compensation power and the acquired reference signal. The efficiency of the proposed mathematical analysis method is performed using MATLAB/Simulink and verified by an experimental setup running under unbalanced conditions.