A Novel Compiler for Regular Expression Matching Engine Construction

Abstract

Using regular expressions in intrusion detection systems (IDS) to represent some dangerous payload contents is a more efficient way than using invariant patterns. For each regular expression in regular expressions rules set a unique Nondeterministic Finite Automaton (NFA) structure is needed to be converted. It is crucial to implement a fast NFA construction. This paper presents a novel method for compiling large-scale regular expression matching engine (REME) on FPGA. We build an intelligent compiler for automatic converting regular expressions into register-transfer-level (RTL) using Verilog language, utilizing only logic slice available on FPGA because of the simple architecture used in the back-end of our compiler. Due to the independent converting method between the converting flow and the block structure, the compiler can easily change the single pattern structure to build the most advanced regular expression-matching engine (REME) which can fit the realistic demand. On a PC with a 3.3 GHz Intel i5-4590 processor and 4 GB memory, our compiler can convert more than one thousand regular expressions in less than 15 seconds. During the converting flow, the compiler provides an arbitrary match string and corresponding test bench file in Verilog as a part of the final output result.