Abstract

Bit permutation is an important operation in many applications. A novel reconfigurable N ×N bit permutation network with a compact structure is presented. It is based on combinatorics theory by cascading two recursive N/2 × N/2 sub-networks, while each subnetwork is cascaded by two N/4×N/4 sub-networks, and so on cascaded until reaching the elementary 4 × 4 seed networks. Its routing algorithm is also established to determine each multiplexor’s status. Then the circuits of different sized permutation networks in a reconfigurable cipher co-processor were designed and implemented in 0.18μm CMOS process. The proposed circuit can achieve an arbitrary n × n permutation and support all types of bit permutations in many cryptographic algorithms. Plus, it consumes less multiplexors than commonly used BENES and OMFLIP networks.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.