Abstract
A charge pump circuit with two feedback loops and a reference current source is proposed. It adopts the replica technique to minimize current mismatch and variation over a wide output range. One feedback loop is used to cancel mismatch between charging and discharging currents in order to minimize PLL reference spur and static phase offset. The other feedback loop stabilizes the current at the design value in different corners by replicating the reference current, which is from a low temperature drift current source. The proposed charge pump circuit with dual feedback loops achieves lower than 0.01% current mismatch, and less than 0.015% current variation over the output voltage range from 0.2 V to 1.0V in the 55 nm CMOS process with 1.2 V supply.
Published Version
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