A Novel BIST Scheme Using Test Vectors Applied by Circuit-under-Test Itself

Abstract

A new built-in-self-test scheme, referred to as Test Vectors Applied by Circuit-under-Test (TVAC), is proposed in this paper. As the point of view of the paper, Circuit-under-Test (CUT) is no longer only regarded as a test object, but also a kind of available resources. By feedback connecting some of the CUTpsilas interior nodes to the input terminals, the method can generate a test set with low area overhead, short test application time, and enable at-speed testing. A ldquofeedback groupingrdquo search algorithm is presented for a given CUT and its test set. The experimental results on ISCAS85 benchmark circuits and MinTest test sets demonstrate that the proposed scheme not only can achieve almost 100% single stuck-at fault coverage, but also has an average 54.1% reduction in test pattern length compared with LFSR reseeding approaches, and an average 6.1% extra area overhead over the area of the largest five CUTs. The percentage of extra area overhead is not sensitive to the size of the CUT.