Abstract
Evolutionary computational techniques have been employed judiciously in various signal processing applications of late. In this paper, such an attempt has been made to design a low-pass linear-phase multiplier-less finite duration impulse response (FIR) filter using differential evolution (DE) algorithm. This particular evolutionary optimization technique has been explored to search the impulse response coefficients of the FIR filter in the form of sum of power of two (SPT) in order to avoid the multipliers during design process. The performance of the designed low-pass filter has been studied thoroughly in terms of its frequency characteristics and primitive requirement of fundamental hardware blocks. The superiority of our design has been ascertained over a number of existing techniques by various means. Finally, the proposed filter of different lengths has been implemented on a field programmable gate array (FPGA) chip for evaluating the competency of this work. The percentage improvement in hardware complexity produced by our design has also been computed and clearly listed in this paper for convenience.
Published Version
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