Abstract

A novel method to reduce the external memory needed by an MPEG-2 HDTV decoder architecture is presented and discussed. The total amount of memory is reduced from 96 to 32 Mbits preserving a good picture quality. Furthermore the approach chosen maintains a low hardware complexity and increases less than 5%, in 0.35 /spl mu/m technology, the total decoder silicon area with respect to the standard decoder.

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