Abstract

The VLSI architecture for an adaptive vector quantizer is presented. The adaptive vector quantization method does not require a-priori knowledge of the source statistics and the pre-trained codebook. The codebook is generated on the fly and is constantly updated to capture local textual features of data. The source data are directly compressed without requiring the generation of codebook in a separate pass. The adaptive method is based on backward adaption without any side information. The speed of data compression by using the proposed adaptive method is much faster than that by using the conventional vector quantization methods. The algorithm is shown to reach the rate distortion function for memoryless sources. In image processing, most smooth regions are matched by the code vectors and most edge data are preserved by using the block-data interpolation scheme. The VLSI architecture consists of two move-to-front vector quantizers and an index generator. It explores parallelism in the direction of the codebook size and pipelining in the direction of the vector dimension. According to the circuit simulations using the popular SPICE program, the computation power of the move-to-front vector quantizer can reach 40 billion operations per second at a system clock of 100 MHz by using 0.8 /spl mu/m CMOS technology. It can provide a computing capability of 50 Mpixels per second for high-speed image compression. The proposed algorithm and architecture can lead to the development of a high-speed image compressor with great local adaptivity, minimized complexity, and fairly good compression ratio. >

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