A Novel 10-Transistor Encoder Design for Modified Booth Encoder to Optimize Power and Area

Abstract

The aim of this paper is to reduce power and area of the Modified Booth Encoder. The encoders of the multiplier are implemented with Pass transistor XOR-XNOR block instead of two separate XOR and XNOR gates. The encoder consists of one XOR and XNOR with common inputs. The proposed encoder is designed with one XOR with two inputs and two outputs. Between two outputs, one is taken at before an inverter, the function is XNOR. Second is taken at after the inverter for XOR function. Due to this the proposed design eliminates two transistors. Hence this design consumes 47% and 77% less power than Pass Transistor XOR-XNOR [11] and CMOS XOR-XNOR respectively and also occupies less area. The results are obtained using H-spice at 2.0V for 180nm technology