A nonvolatile single ferro fet memory concept with disturbance free operation scheme

Abstract

A novel AND-type ferroelectric field effect transistor memory concept for solid state mass storage applications is described. Disturbance problems caused by disturbance pulses between adjacent memory cells are prevented by device improvements and by choosing appropriate programming and read voltages. The memory array presented here uses global source lines each of which is connected to its own sense amplifier. Disturbance free and fully functional operation of the memory concept has been demonstrated by circuit simulations. The results of the simulations yield a data access time comparable to DRAMs.