Abstract
In Multi-Level-Cell (MLC) NAND flash memory, cell-to-cell interference (CCI) and retention time have become the main noise that degrades the data storage reliability. To mitigate such noise, a relative precision loss (RPL) nonuniform reference voltage sensing strategy is proposed in this paper. First, based on the NAND flash channel model with CCI and retention noise, we simulate the data storage process of MLC NAND flash by Monte Carlo method, and find that the threshold-voltage of each disturbed storage state shows approximately to be Gaussian distributed. Then, by Gaussian approximation, the distribution of threshold voltage can be estimated easily in mathematics with a little loss. Second, we introduce a concept of log-likelihood ratio (LLR)-based RPL ratio to determine the dominating overlap regions, and then propose a new nonuniform reference voltage sensing strategy. This strategy does not only reduce the memory sensing precision (i.e., the number of reference voltages), but also maintains the reliability of the soft information of NAND flash memory channel output for soft decoding. Third, we implement extensive simulations to verify the performance of the new nonuniform sensing strategy. The BER performances of LDPC codes for different sensing strategies are provided to show that the proposed LLR-based RPL-nonuniform sensing strategy can make a good compromise between memory sensing latency and error-correction performance.
Highlights
Today, in order to provide high-quality services to end users, data centers need fast and highly reliable storage
It can be observed that the proposed relative precision loss (RPL)-nonuniform sensing strategy outperforms the traditional uniform sensing strategy, and that the BER performance of the proposed RPL-nonuniform sensing strategy enhances as the number of sensing levels increases
It can be seen that the proposed RPL-nonuniform sensing strategy outperforms Dong's nonuniform sensing strategy
Summary
In order to provide high-quality services to end users, data centers need fast and highly reliable storage. With the increased storage density of flash memory, memory blocks is increasingly susceptible to a variety of channel noises, including data retention, Cell-to-Cell interference (CCI), program/erase (P/E) cycles and read disturb (Cai, 2017; Cai, Luo, Ghose & Mutlu, 2015; Wang, Dong, Pan, Zhou & Stievano, 2011), which can shift the state threshold voltage. For high-quality and accurate LLRs, NAND flash memory chips demand perform small range of soft-decision memory-cell sensing. The threshold voltage distribution of storage states are severely shifted as the NAND flash chip scaling down and retention time increase (Prall, 2007). Based on the channel model of NAND flash memory system, we use Monte Carlo to simulate flash memory with LDPC codes as ECC, which suffer from various noises, including cell-to-cell interference and retention time. Simulation results show that the proposed new nonuniform sensing strategy exhibits better error-correcting performance with respect to other existing counterparts while considering more noise interference
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