A nonlinear CMOS analog cell for VLSI signal and information processing

Abstract

A simple reconfigurable continuous-time nonlinear CMOS building block for analog VLSI applications is presented. The new block is introduced as a basic analog cell for the implementation of analog VLSI systems. It simultaneously achieves four-quadrant multiplication and division. Its applications in both analog signal and information processing are discussed. These include multiplication, signal squaring, division, signal inversion, amplitude modulation, RMS-DC conversion, and neural computing. Using the new cell, a MOS VLSI implementation of a feedback/feedforward neural network is developed which achieves the scalar product of two n-tuple vectors by 4(n+1) MOS transistors and one operational amplifier. To verify the versatility of the new cell and its applications, experimental results obtained from a test chip that was fabricated using the MOSIS 2- mu m CMOS process are included.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>