Abstract

In CMOS integrated circuit (IC) design, operational amplifiers are one of the most useful active devices to enhance applications in analog signal processing, signal conditioning and so on. However, due to the CMOS technology downscaling, along the very large number of design variables and their trade-offs, it results difficult to reach target specifications without the application of optimization methods. For this reason, this work shows the advantages of performing many-objective optimization and this algorithm is compared to the well-known mono- and multi-objective metaheuristics, which have demonstrated their usefulness in sizing CMOS ICs. Three CMOS operational transconductance amplifiers are the case study in this work; they were sized by applying mono-, multi- and many-objective algorithms. The well-known non-dominated sorting genetic algorithm version 3 (NSGA-III) and the many-objective metaheuristic-based on the R2 indicator (MOMBI-II) were applied to size CMOS amplifiers and their sized solutions were compared to mono- and multi-objective algorithms. The CMOS amplifiers were optimized considering five targets, associated to a figure of merit (FoM), differential gain, power consumption, common-mode rejection ratio and total silicon area. The designs were performed using UMC 180 nm CMOS technology. To show the advantage of applying many-objective optimization algorithms to size CMOS amplifiers, the amplifier with the best performance was used to design a fractional-order integrator based on OTA-C filters. A variation analysis considering the process, the voltage and temperature (PVT) and a Monte Carlo analysis were performed to verify design robustness. Finally, the OTA-based fractional-order integrator was used to design a fractional-order chaotic oscillator, showing good agreement between numerical and SPICE simulations.

Highlights

  • In terms of the optimal sizing of CMOS analog integrated circuits (ICs), it remains a challenge to accomplish target specifications and, during recent years, metaheuristics have shown their usefulness in this task

  • This paper shows the application of mono, multi- and many-objective optimization algorithms to size three different CMOS operational amplifiers (OTAs) topologies

  • The many-objective optimization process was performed considering five different electrical characteristics taken as objective functions, namely, figure of merit (FoM), DC gain, power consumption, common-mode rejection ratio (CMRR) and total MOS area

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Summary

Introduction

In terms of the optimal sizing of CMOS analog integrated circuits (ICs), it remains a challenge to accomplish target specifications and, during recent years, metaheuristics have shown their usefulness in this task. Metaheuristics, as optimization algorithms, have demonstrated to be a good option to size CMOS analog ICs, because they are suitable for global optimization; in addition, they support circuit simulators such as SPICE (simulation program with integrated circuit emphasis) within their optimization loop, to evaluate the circuit’s electrical characteristics. On similar optimization problems, usually they fail when trying to take full advantage on the knowledge transfer in order to accelerate convergence for the search process, or they may get trapped in a solution that is a local optimum [18] To cope with these problems, this work shows the appropriateness of applying many-objective metaheuristics to size CMOS OTAs considering more than four objectives.

Formulation of the Sizing Problem
Mono-Objective Algorithms
PSO Algorithm
MOL Algorithm
DE Algorithm
Multi-Objective Algorithms
NSGA-II Algorithm
Many-Objective Algorithms
NSGA-III Algorithm
OTA-Based Fractional-Order Chaotic Oscillator
Building Blocks
PVT and Monte Carlo Analysis of the Fractional-Order Integrator
Fractional-Order Chaotic Oscillator Design Using OTAs
Findings
Conclusions
Full Text
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