A noncoherent low-power high-data-rate BPSK demodulator and clock recovery circuit for implantable biomedical devices

Abstract

This paper introduces a noncoherent low-power BPSK demodulator and clock recovery circuit for wirelessly-powered biomedical implants. The received data are detected using a pulse width measurement technique, which is based on complementary analog voltage slopes generated by charging two capacitors with constant currents. In addition to low power consumption and simple circuit implementation, the proposed demodulator exhibits a data-rate-to-carrier-frequency ratio of as high as 100%. Therefore, the proposed demodulator is especially appropriate for implantable biomedical devices such as visual prostheses, where high-speed data transfer is of crucial importance. The circuit is designed and simulated in a standard 0.18-µm CMOS process and occupies 50×70 µm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of silicon area. Operated using a 1.8-V supply voltage, the proposed demodulator and clock recovery circuit consumes 77.9µW at a data rate of 10Mbps. Experimental results of a proof-of-concept prototype also support the proposed idea.