Abstract
Self-interference (SI) mitigation is critical for full-duplex and frequency-domain duplex systems. Canceller noise and linearity limits the SI power that can be tolerated at RX input. A dual-path SI cancellation scheme is presented where the noise and distortion from the canceller are addressed through a differential noise-cancelling path. The proposed scheme relaxes the noise/linearity trade-offs in canceller design and a 400 MHz implementation in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.18\mu \mathrm{m}$</tex> CMOS demonstrates 20 dB SI cancellation over 50 MHz bandwidth and 23 dB cancellation for +1dBm peak SI power while degrading RX NF by 3.8 dB.
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