Abstract
The design of a mixed-signal random number generator (RNG) integrated circuit (IC) suitable for integration with hardware cryptographic systems is presented. Certain applications in cryptography require the use of a truly RNG, a device which produces unpredictable and unbiased digital signals derived from a fundamental noise mechanism. For IC-based cryptographic systems, an RNG must harness randomness from a low-power noise signal yet remain insensitive to deterministic influences such as crosstalk, power supply noise, and clock signal coupling through the substrate. An RNG IC utilizing established analog IC design techniques was designed and fabricated in a 2-/spl mu/m CMOS technology. Sequences generated by the experimental system repeatedly passed many standard randomness tests for bit rates up to 1.4 MHz. No changes in randomness performance were observed as the system was exposed to power supply noise and substrate signal coupling. The system occupies a total chip area of 1.5 mm/sup 2/ and dissipates 3.9 mW of power.
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