A noise-based random bit generator IC for applications in cryptography

Abstract

The design of a random bit generator (random number generator) IC, with analog sub-circuits and suitable for integration with VLSI cryptographic systems, is presented. Certain applications in cryptography require the production of an unpredictable and unbiased stream of binary data derived from a fundamental noise mechanism. A prototype random bit generator IC was constructed and tested to be functional for bit rates up to 1.4 MHz. The experimental system passes many standard randomness tests even when exposed to non-random influences such as power supply noise and substrate signal coupling. The system occupies a chip area of 1.5 mm/sup 2/ in a 2-/spl mu/m CMOS technology and dissipates 3.9 mW of power.