A New Type of Self-Aligned Technology for RF and Microwave Graphene Field-Effect Transistors

Abstract

A new type of fully self-aligned technology for graphene field-effect transistors was presented, in which a PVD SiO2 layer was taken as mask for the deposition of self-aligned source, drain and gate contacts. In this key process, the dielectric edge-sides exposure phenomenon during metal thermal evaporation was exploited. In the prepared self-aligned GFETs, both parasitic capacitance of the gate overlapped source and drain areas and series resistance of the spacing areas between gate and source and drain contacts were eliminated. The DC characterization and on-chip microwave measurement of the fabricated GFETs with channel length of 1give a maximum transconductanceof 2.32,field-effect mobilities of electrons and holes of 6924and 7035, and intrinsic cutoff frequencyof 0.5GHz, respectively, showing a significant improvement of both DC and RF performance.