A new SPICE-compatible model and related self-consistent parameter extraction for the dual-gate JFET

Abstract

A model for the dual-gate JFET is presented. The major improvement over previous models is the capability to bias the top gate and bottom gate independently. This is accomplished through the use of a controlled voltage source with two controlling inputs and with its output driving the gate terminal of the JFET. Since the model can be represented as a subcircuit, it is compatible with SPICE and SPICWE-derived circuit simulators. Self-consistent parameter extraction routines based on an exact operational definition of each model parameter are discussed. Unique extraction algorithms are developed for each model form. Only after consistent extraction routines have been developed for the model within a circuit simulator are they applied to the physical device. This provides an exact operational definition for each model parameter. Accurate determination of the model parameters without optimization has been proven possible, and excellent agreement between physical devices and simulation results is demonstrated. >