Abstract
This paper presents a new simulation platform for UHF RFID tag development, which efficiently reduces the development time and cost to achieve rapid, flexible and efficient simulation and design for UHF RFID tag. The simulation platform includes the RF analog front end and the tag control logic, which is implemented in the Altera FPGA. Besides coinciding with ISO/IEC 18000-6B/C series and EPC C1G2 Standards, the platform can also fulfill other RFID standards after changing the tag control logic in FPGA. Consequently, it implements the fast prototype design of UHF RFID tag. The RF analog front end using 0.18im one-poly six-metal CMOS process contains matching network, rectifier, voltage regulator, demodulator, local oscillator, voltage limiter, backscatter modulator, and reset circuit, etc.
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