Abstract

HgCdTe electrons initiated avalanche photodiodes (e-APDs) in linear multiplication mode can be used for high speed applications such as active imaging. A readout integrated circuit of e-APD FPA is designed for dual mode passive/active imaging system. Unit cell circuit architecture of ROIC includes a high voltage protection module, a Sample-Hold circuit module, a comparator, output driver stage and a integrator module which includes a amplifier and three capacitors. Generally, APD FPA works at reversed bias such as 5V-15V in active imaging mode, and pixels’ dark currents increase exponentially as the reverse-bias voltage is increased. Some cells of ROIC may be short to high voltage because of avalanche breakdown of diodes. If there is no protection circuit, the whole ROIC would be burnt out. Thus a protection circuit module introduced in every ROIC cell circuit is necessary to make sure the rest units of ROIC can still work. Conventional 5V CMOS process is applied to implement the high voltage protection with the small area other than LDMOS in high voltage BCD process in the limited 100μm×100μm pitch area. In integrator module, three integration capacitors are included in the ROIC to provide switchable well capacity. One of them can be shared in two modes in order to save area. Constraints such as pixel area and power lead us design toward a simple one-stage cascade operational transconductance amplifier (OTA) as pre-amplifier which can avoid potential instability caused by inaccuracy of MOSFET Model at 77K.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call