Abstract
A significant mismatch occurs when we predict the gate-induced drain leakage current (GIDL) by using existing one-dimensional (l-D) models. It's found that the gate-induced drain leakage current is attributed to not only the vertical field but also the lateral field near the drain-to-gate overlap region. Therefore, a new quasi-two-dimensional (quasi-2-D) model considering both the lateral and vertical fields for predicting the gate-induced drain leakage current is proposed by using the drain-induced energy-barrier reduction in our model. The calculated results using the developed quasi-2-D model are in good agreement with measured values for a wide range of gate and drain biases. Therefore, the proposed new model can be used to simulate the hot-carrier band-to-band tunneling current for p-channel flash memory device.
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