Abstract

Template matching is a technique used in many different areas in the literature to search for a small template image in a larger source image. The execution time of the technique can be quite high depending on the size of the source image, since the search made in the large image is realized pixel by pixel in the form of frames selected in the template size. This situation creates inconveniences in terms of real-time use of the technique. In addition, the results cannot be interpreted correctly due to the fact that there are many fake matches in the region where there are real matches. In this study, the technique was strengthened with a new and simple proposal called neighborhood pool to prevent fake matches. In order to reduce the long scan time to real-time execution time, the reinforced template matching technique was redesigned as an FPGA-based hardware architecture. This new micro-hardware architecture, which includes the neighborhood pool idea, was synthesized and embedded in the FPGA device by time analysis and tested on the device. For the tests of the study, the face matching scenario was chosen and the face image of a particular person was searched in the larger source image. The improved template matching technique in software-based tests reduced the execution time by about 4.5 times compared to the classical template matching method, and about 300 times in hardware testing, and it was observed that the system execution time became compatible with real-time. When the proposed new micro hardware architecture is compared with the CNN and template matching designs in the literature, it is clearly seen that it has a very low hardware requirement compared to them.

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