A New Double Trench, Buried-P JTE Edge Termination for 1200 V-class SiC Devices

Abstract

A new double trench, buried-P junction termination extension (JTE) edge termination structure for 1200 V-class SiC devices is proposed and analyzed. The proposed structure features a short JTE followed by two trenches with buried-P layers. The trenches and buried-P layers work together with the JTE to facilitate the spreading of the depletion region toward the end of the edge termination. In particular, the electric field at the end of the JTE region will be reshaped by the first trench and subsequently the second trench, alleviating electric field crowding. Due to the electric field redistribution, the proposed structure can reduce the JTE dose sensitivity and widen the process window. A fabrication process has been designed. The JTE region and the buried-P layers are implanted simultaneously without extra masks. Simulation results show that the proposed structure can nearly achieve the ideal planar junction breakdown voltage of 1503 V with an edge width of only $17\mu \mathrm{m}$. Compared with the conventional guard ring structure, the edge width of the proposed structure is approximately five times shorter.