Abstract
Instead of cascading two two-input XOR gates, we design a new structure of three-input function on the transistor level in this paper. The basic structure of the proposed three-input XOR function utilizes the least number of transistors and no complementary input signals are needed. From the simulated results, it proves the basic structure works very well. Under the consideration of driving capacity, we can simply attach a standard buffer to the basic structure for this purpose. The experiments verify that our driving-enhanced three-input XOR gate has more driving capacity and less power consumption as well as power-delay product than the previous cascaded designs using the same number of transistors. The simulation work is done by HSPICE on a SUN SPARC10 workstation.
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