A New Digital Recursive Filter Structure With Low Roundoff Noise And Low Limit Cycle Oscillations*

Abstract

Conventional digital filters, in which signal samples and filter coefficients are represented by 8- to 16-bit words, have some disadvantages for VLSI implementation due to the high hardware complexity of multibit multipliers. Incremental digital filters, based on delta modulation (DM) encoding, have emerged as a promising alternative to the conventional approach, because highly modular 'multiplier-free' structures can be built using incremental methods. We propose a new multiplier- free biquad filter structure suitable for VLSI implementation with low roundoff noise and low limit cycle oscillations.