Abstract

It is pointed out that conventional digital filters, in which signal samples and filter coefficients are represented by 8- to 16-bit words, have some advantages for VLSI implementation due to the high hardware complexity of multibit multipliers. Incremental digital filters, based on delta modulation (DM) encoding, having emerged as a promising alternative to the conventional approach, because highly modular 'multiplier-free' structures can be built using incremental methods. A multiplier-free biquad filter structure is proposed which is suitable for VLSI implementation with low roundoff noise and low limit cycle operations. >

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