A new adaptive selection strategy for reducing latency in networks on chip

Abstract

Networks on chips (NoCs) are a concept inspired by computer networks for constructing multiprocessor systems that can handle communication across processing cores. One of the most critical applications of NOC is efficient nonstop routing. Different routes exist in these networks to get from one node to another; thus, a function that can assist in determining the optimum route to the target should be available. This paper uses a new hybrid method called Scored Regional congestion aware and DICA (ScRD) to select a better output channel and increase NOC performance. After applying the ScRD algorithm, the traffic packets are examined by an analyzer, which determines if the NoC traffic is local or non-local based on the number of hops. Therefore, if the traffic is local, a scoring mechanism will select a better output channel; otherwise, the best output channel will be chosen using DICA or RCA selection functions, depending on the system state and the introduced parameter. Finally, Nirgam simulation was used to test the suggested method under various traffic conditions and selection criteria. The simulation results demonstrated that the strategy outperformed delay time, throughput, and energy consumption alternatives. It reduced packet delay by 27.10% and increased throughput by 10%. When these two factors were considered, energy consumption dropped by 6.86%. Also, the synthesis results showed that the hardware cost of the proposed approach is 1.2% lower than the two basic methods.