Abstract
XOR-XNOR circuits are the basic building block of many arithmetic and encryption circuits. This paper proposes a low-power 5 transistor XOR-XNOR circuit. This paper also evaluates and compares the performance of various XOR-XNOR circuits. The performance of these circuits are based on 90nm process model at all range of supply voltage starting from 0.6V to 1.2V is evaluated by the comparison of the simulation results obtained from TSPICE. Simulation results reveal that the proposed circuit exhibit lower power-delay product (PDP), more power efficient and faster than the best available XOR-XNOR circuit in literature. The proposed circuit utilizes the least number of transistors and no complementary input signals is used.
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